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Table 1

Overview of the used architecture.

Stage Layer Channel in Channel out Kernel size Stride Padding
Pre block Convolution
PReLU
2
64
64 64 (9 × 9) 1 4

Residual block (×8) Convolution
Batch Norm
PReLU
Convolution
Batch Norm
Elementwise Sum
64
64
64
64
64
64
64
64
64
64
64
64
(3 × 3)


(3 × 3)

1

–1

1

–1


Post Block Convolution
Batch norm
Elementwise sum
64
64
64
64
64
64
(3 × 3) 1 1

Final block Convolution 64 2 (9 × 9) 1 4

Notes. For each layer, the number of input and output channels is given. In the case of convolutional layers, the kernel size, stride, and padding are specified.

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