The results of running the proposed EM algorithm on a stack of 500 DC level corrected bias frames. There is a clear structure in the fixed bias, the structure has an 8 pixel modulation, presumably from the readout amplifier. The spurious charge probability map shows a valley-like structure. This structure is expected as the clock pulses for vertical shift will be smoothed out passing through the chip. Also the spurious charge probability in the overscan region to the left is very low as these pixels are virtual. The map of the EM gain and the readout noise show very little structure which is to be expected, because there is only one readout amplifier. There is a slight structure in the gain map. The structure is due to less variance in the gain determination at the edges, as the rate of spurious electrons, which carry information about the gain, is higher at the edges.