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Table 2

Number of F(1, 0) multigrid cycles, computational work, and CPU times (in seconds) on a single processor of an Intel Xeon system required to reduce the defect by six orders of magnitude for the bump problem.

MS5E MS3I/SGS MS3I/RBGS(4) MS3I/RBGS(8)
M Mesh Ncyc Work CPU Ncyc Work CPU Ncyc Work CPU Ncyc Work CPU

0.3 32 × 16 383 3404 2.6 18 96 0.29 18 96 0.32 14 75 0.34
64 × 32 588 5227 16 22 117 1.5 25 133 1.8 17 91 1.7
128 × 64 1151 10 231 123 31 165 10 38 203 13 24 128 11
256 × 128 2069 18 391 892 48 256 66 64 341 101 36 192 75

0.5 32 × 16 269 2391 1.8 13 69 0.21 14 75 0.26 12 64 0.27
64 × 32 406 3609 11 14 75 0.94 18 96 1.3 13 69 1.3
128 × 64 752 6684 79 20 107 6.4 26 139 8.7 18 96 8.0
256 × 128 1330 11 822 575 30 160 41 42 224 66 26 139 56

0.8 32 × 16 298 2649 2.2 21 112 0.33 24 128 0.40 23 123 0.55
64 × 32 556 4942 16 58 309 4.2 57 304 4.1 54 288 5.4
128 × 64 720 6400 83 43 229 14 40 213 13 36 192 16
256 × 128 DNC 81 432 112 67 357 107 107 571 217

1.4 32 × 16 319 2836 2.3 29 155 0.45 27 144 0.48 47 251 1.1
64 × 32 445 3956 13 25 133 1.7 27 144 1.9 25 133 2.5
128 × 64 DNC 25 133 8.2 34 181 11 30 160 15
256 × 128 DNC 29 155 40 62 331 99 41 219 83

Notes. DNC: did not converge, MS5E: multigrid solver based on explicit five-stage smoothing scheme, MS3I/SGS, MS3I/RBGS: multigrid solver based on a three-stage implicit smoothing scheme with either symmetric or red-black Gauss-Seidel smoothing stages. Values in parentheses denote the number of Gauss-Seidel sweeps per implicit stage.

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